发明名称 CDR CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a compact low-power CDR (circuit data recovery) circuit which has instantaneous response characteristics to input data, stably operates even when data with high jitter is input, and reduces output jitter. <P>SOLUTION: The CDR circuit includes: a gating circuit 10 that outputs a pulse when input data 4 is switched; a VCO 11 that adjusts the phase of an output clock so as to be synchronized with the output pulse of the gating circuit 10; a VCO 13 that adjusts the phase of the reproduction clock 7 so as to be synchronized with the output clock of the VCO 11; a flip-flop 3 that identifies the input data 4 on the basis of the reproduction clock 7; a buffer amplifier 16 provided between an output terminal of the gating circuit 10 and an input terminal of the VCO 11; and a buffer amplifier 17 provided between an output terminal of the VCO 11 and an input terminal of the VCO 13. <P>COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011155563(A) 申请公布日期 2011.08.11
申请号 JP20100016508 申请日期 2010.01.28
申请人 NIPPON TELEGR & TELEPH CORP 发明人 KAMITSUNA HIDEKI;KATSURAI HIROAKI;OTOMO YUSUKE
分类号 H04L7/02;G06F1/12;H03K5/26;H03L7/06;H03L7/08 主分类号 H04L7/02
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