| 摘要 |
A DMA control device and a data transfer method, which make it possible to use a DMA channel independent of an operation mode of a processor and realize the protection of DMA control parameters during DMA operation (during a data transfer), while reducing the number of shift of an operating mode of the processor as small as possible, are provided. In requesting a DMA start by locking an access to a ch-0 DMA control register 114 in a secure mode, a CPU 101 instructs an unlock set register 118 to release an access lock when the transfer is completed. Then, when a parameter controlling circuit 119 receives a notification of transfer completion from a ch-0 state managing circuit 116, such parameter controlling circuit instructs a lock set register 115 to release the lock in accordance with the setting of the unlock set register 118.
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