发明名称 |
DIGITAL SIGNAL PROCESSOR COMPRISING A COMPUTE ARRAY WITH A RECIRCULATION PATH AND CORRESPONDING METHOD |
摘要 |
<p>A processor includes a compute array comprising a first plurality of compute engines serially connected along a data flow path such that data flows between successive compute engines at successive times. The first plurality of compute engines includes an initial compute engine and a final compute engine. The data flow path includes a recirculation path connecting the final compute engine to the initial compute engine with no compute engine therebetween.</p> |
申请公布号 |
WO2011097427(A1) |
申请公布日期 |
2011.08.11 |
申请号 |
WO2011US23666 |
申请日期 |
2011.02.04 |
申请人 |
ANALOG DEVICES, INC.;LERNER, BORIS;GARDE, DOUGLAS |
发明人 |
LERNER, BORIS;GARDE, DOUGLAS |
分类号 |
G06F15/80;G06F9/302;G06F9/312;G06F9/315;G06F9/34;G06F12/06;G06F13/16;G06F15/173;G06F15/78 |
主分类号 |
G06F15/80 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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