| 摘要 |
PROBLEM TO BE SOLVED: To provide a viterbi decoder and a viterbi decoding method, capable of reducing power consumption while maintaining decoding accuracy. SOLUTION: The viterbi decoder includes: a reception state detection circuit 94 for detecting a reception state; a plurality of memory elements 11, 12 for storing selection signals from an ACS circuit; first and second trace-back circuits 21, 22 for performing trace-back on the basis of the selection signals stored in the memory elements 11, 12; a selection circuit 71 for selecting a first maximum likelihood signal inputted from the outside or a second maximum likelihood signal generated by performing the trace-back by the trace-back circuit 22; and a trace-back control circuit 91 for controlling the selection circuit 71 on the basis of the detection result of the reception state detection circuit. The trace-back control circuit 91 makes the selection circuit 72 select the first maximum likelihood signal or the second maximum likelihood signal corresponding to the reception state, and the trace-back circuit 21 performs the trace-back with the first or second maximum likelihood signal as a start point. COPYRIGHT: (C)2011,JPO&INPIT
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