CDR CIRCUIT

摘要

PROBLEM TO BE SOLVED: To provide a CDR (circuit data recovery) circuit that generates a reproduction clock having high frequency stability and low jitter.

SOLUTION: The CDR circuit includes: a gating circuit 10 for outputting a pulse when input data 4 is switched; a VCO 12 arranged in a phase synchronization loop; a G-VCO 13 for outputting a reproduction clock 7 synchronized with the input data 4 by adjusting the phase of the reproduction clock 7 so as be synchronized with the output pulse of the gating circuit 10; and a flip-flop 3 for identifying the input data 4 on the basis of the reproduction clock 7. A reference clock 5 having the same frequency as the data rate of the input data 4 or the output clock of the VCO 12 is input into the G-VCO 13 as an injection signal 9.

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