SEGMENT AND BIPARTITE GRAPH BASED APPARATUS AND METHOD TO ADDRESS HOLD VIOLATIONS IN STATIC TIMING
摘要
<p>A method of reducing the number of hold violations in an integrated circuit comprises: determining a segment, wherein the segment is a connection between a plurality of points; associating at least one path with each segment, wherein the path is a connection of points including a starting point and an endpoint; determining a weight for at least one said segment, wherein the weight is determined by a number of paths associated with the at least one said segment; ranking the segments in a matrix based upon the determined weight associated with at least one of the segments; and inserting a buffer at least one of the segments based upon said ranking.</p>
申请公布号
WO2011097460(A1)
申请公布日期
2011.08.11
申请号
WO2011US23722
申请日期
2011.02.04
申请人
QUALCOMM INCORPORATED;NAGARAJ, KELAGERI;RAJ, SATISH K.;SANAKA, VENUGOPAL;DASEGOWDA, RAGHAVENDRA C.
发明人
NAGARAJ, KELAGERI;RAJ, SATISH K.;SANAKA, VENUGOPAL;DASEGOWDA, RAGHAVENDRA C.