发明名称 Digital locked loop on channel tagged memory requests for memory optimization
摘要 A method and system for performing memory optimization. The method includes receiving from a processor a plurality of read/write requests, wherein at least a portion of the read/write requests are assigned respective identifiers for associating related ones of the read/write requests; measuring arrival times of the read/write requests assigned to each of the identifiers; determining a periodicity and a phase of the read/write requests based on the identifiers in order to determine predicted arrival times of future read/write requests assigned to each of the identifiers; creating a real-time schedule of memory requests using the arrival times of the read/write requests and the predicted arrival times of the future read/write requests; using the real-time schedule to determine idle periods where none of the read/write requests will be received; and performing opportunistic functions during the idle periods, including performing at least one of garbage collection and translation cache pre-fetch.
申请公布号 US7996642(B1) 申请公布日期 2011.08.09
申请号 US20080107694 申请日期 2008.04.22
申请人 MARVELL INTERNATIONAL LTD. 发明人 SMITH RONALD
分类号 G06F12/00 主分类号 G06F12/00
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