发明名称 Interrupt arbitration for multiprocessors
摘要 Technologies are generally described herein for handling interrupts within a multiprocessor computing system. Upon receiving an interrupt at the multiprocessor computing system, a priority level associated with an interrupt handler for the interrupt can be determined. Current task priority levels can be queried from one or more processors of the multiprocessor computing system. One of the processors can be assigned to execute the interrupt handler in response to the processor having a lowest current task priority level. Interrupt arbitration can schedule and communicate interrupt responses among processor cores in a multiprocessor computing system. Arbitration can query information about current task or thread priorities from a set of processor cores upon receiving an interrupt. The processor core that is currently idle or running the lowest priority task may be selected to service the interrupt.
申请公布号 US7996595(B2) 申请公布日期 2011.08.09
申请号 US20090423368 申请日期 2009.04.14
申请人 LSTAR TECHNOLOGIES LLC 发明人 WOLFE ANDREW
分类号 G06F13/26;G06F13/24;G06F13/32 主分类号 G06F13/26
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