发明名称 Non-volatile memory cells formed in back-end-of line processes
摘要 An integrated circuit device includes a substrate; a bottom electrode over the substrate wherein the bottom electrode is in or over a lowest metallization layer over the substrate; a blocking layer over the bottom electrode; a charge-trapping layer over the blocking layer; an insulation layer over the charge-trapping layer; a control gate over the insulation layer; a tunneling layer over the control gate; and a top electrode over the tunneling layer.
申请公布号 US7994564(B2) 申请公布日期 2011.08.09
申请号 US20060602065 申请日期 2006.11.20
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. 发明人 WANG SHIH WEI
分类号 H01L29/788;H01L21/8246;H01L21/8247 主分类号 H01L29/788
代理机构 代理人
主权项
地址