发明名称 Video and Graphics System with an MPEG Video Decoder for Concurrent Multi-Row Decoding
摘要 A video and graphics system processes video data including both analog video, e.g., NTSC/PAL/SECAM/S-video, and digital video, e.g., MPEG-2 video in SDTV or HDTV format. The video and graphics system includes a video decoder, which is capable of concurrently decoding multiple SLICEs of MPEG-2 video data. The video decoder includes multiple row decoding engines for decoding the MPEG-2 video data. Each row decoding engine concurrently decodes two or more rows of the MPEG-2 video data. The row decoding engines have a pipelined architecture for concurrently decoding multiple rows of MPEG-2 video data. The video decoder may be integrated on an integrated circuit chip with other video and graphics system components such as transport processors for receiving one or more compressed data streams and for extracting video data, and a video compositor for blending processed video data with graphics.
申请公布号 US2011188580(A1) 申请公布日期 2011.08.04
申请号 US20100961096 申请日期 2010.12.06
申请人 VALMIKI RAMANUJAN K;BHATIA SANDEEP 发明人 VALMIKI RAMANUJAN K.;BHATIA SANDEEP
分类号 H04N7/26;G06T9/00;G09G1/16;G09G5/00;G09G5/02;G09G5/06;G09G5/12;G09G5/14;G09G5/28;G09G5/34;G09G5/36;G09G5/39;G09G5/395;G09G5/397;G09G5/42;H04N5/14;H04N5/44;H04N5/445;H04N5/45;H04N5/46;H04N7/01;H04N9/45;H04N9/64;H04N11/14;H04N11/20 主分类号 H04N7/26
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