发明名称 MEMORY ACCESS METHODS AND APPARATUS
摘要 A disclosed example apparatus includes a row address register (412) to store a row address corresponding to a row (608) in a memory array (602). The example apparatus also includes a row decoder (604) coupled to the row address register to assert a signal on a wordline (704) of the row after the memory receives a column address. In addition, the example apparatus includes a column decoder (606) to selectively activate a portion of the row based on the column address and the signal asserted on the wordline.
申请公布号 WO2011094437(A2) 申请公布日期 2011.08.04
申请号 WO2011US22763 申请日期 2011.01.27
申请人 HEWLETT-PACKARD DEVELOPMENT COMPANY, L.P.;UNIVERSITY OF UTAH RESEARCH FOUNDATION;MURALIMANOHAR, NAVEEN;UDIPI, ANIRUDDHA;CHATTERJEE, NILADRISH;BALASUBRAMONIAN, RAJEEV;DAVIS, ALAN LYNN;JOUPPI, NORMAN PAUL 发明人 MURALIMANOHAR, NAVEEN;UDIPI, ANIRUDDHA;CHATTERJEE, NILADRISH;BALASUBRAMONIAN, RAJEEV;DAVIS, ALAN LYNN;JOUPPI, NORMAN PAUL
分类号 G11C11/4063;G06F12/00;G11C7/10 主分类号 G11C11/4063
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