发明名称 INFORMATION PROCESSING APPARATUS
摘要 <p><P>PROBLEM TO BE SOLVED: To provide an information processing apparatus for suppressing power consumption to the minimum necessary level according to necessary performance when carrying out digital signal processing. <P>SOLUTION: The information processing apparatus includes: a CPU 1; a bus master 2; a bus 3 and a bus 4 to which the CPU 1 and the bus master 2 are connected; a memory 5 connected to the bus 3; a memory 6 connected to the bus 4; and a power supply control part 7 for controlling the power supply of the bus 3 and the bus 4 and the memory 5 and the memory 6. The CPU 1 compares a bus band corresponding to the amount of processing of digital signal processing and a bus band which is being currently used, and when determining that the bus band is additionally necessary, turns on the power supply of the bus 4 and the memory 6 by controlling the power supply control part 7 so that it is possible to increase the bus band, and when determining that it is not necessary to use a plurality of buses, the CPU 1 turns off the power supply of the bus 4 and the memory 6 by controlling the power supply control part 7 so that it is possible to reduce the bus band, and to suppress any unnecessary power consumption. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011150556(A) 申请公布日期 2011.08.04
申请号 JP20100011632 申请日期 2010.01.22
申请人 PANASONIC CORP 发明人 SHOGO HISASHIGE;SATO TETSUYA
分类号 G06F1/32;G06F13/36 主分类号 G06F1/32
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