发明名称 TEST METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT, TEST PROGRAM OF THE SAME, AND TEST APPARATUS OF THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a method for reducing the time required for testing a semiconductor chip. SOLUTION: The test method of the semiconductor integrated circuit includes a first step of assigning any mutually different test among a plurality of tests to each of a plurality of the semiconductor integrated circuit devices; a second step of performing each of the tests assigned to each of the plurality of the semiconductor integrated circuit devices; a third step of assigning a specific test as the next test to the remaining semiconductor integrated circuit devices, after removing defective products from the plurality of the semiconductor integrated circuit devices, when the defective products are detected among the plurality of the semiconductor integrated circuit devices in the specific test among the plurality of the tests; and a fourth step of performing each of the specific tests assigned to the remaining semiconductor integrated circuit devices. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011149744(A) 申请公布日期 2011.08.04
申请号 JP20100009500 申请日期 2010.01.19
申请人 RENESAS ELECTRONICS CORP 发明人 YAMAMOTO SHINGO
分类号 G01R31/28;H01L21/66;H01L21/822;H01L27/04 主分类号 G01R31/28
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