发明名称 SEMICONDUCTOR MEMORY DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To improve data write speed by accelerating verifying operation. <P>SOLUTION: A memory cell array 1 is configured to have a plurality of memory cells, each of the memory cells being connected to a word line and a bit line and storing one of n values (n is a natural number equal to or larger than 3). A control circuit 7 controls the potentials of the word line and bit line according to input data and writes the data into a memory cell. A data storage circuit 10 is connected to the bit line and stores data of at least 1 bit. When verifying whether the threshold voltage of the memory cell has reached a k-valued threshold voltage by the writing operation, the control circuit 7 performs the verifying operation with a threshold voltage lower than the k-valued threshold voltage. If the threshold voltage of the memory cell has exceeded the threshold voltage lower than the k-valued threshold voltage, the control circuit 7 sets the data within the data storage circuit to the same data to be written to an i-valued threshold voltage (i<k) lower than the k-valued threshold voltage. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011150781(A) 申请公布日期 2011.08.04
申请号 JP20110049503 申请日期 2011.03.07
申请人 TOSHIBA CORP 发明人 SHIBATA NOBORU;TANAKA TOMOHARU
分类号 G11C16/02;G11C16/04;H01L21/8247;H01L27/10;H01L27/115;H01L29/788;H01L29/792 主分类号 G11C16/02
代理机构 代理人
主权项
地址