| 摘要 |
A multi-layer electronic package having polymeric tape layers, where at least one of the polymeric tape layers has a via, through hole, or aperture therein to pass wiring between the layers. This enables a balance of package size, adhesive thickness, chip access, inventory management, package width, JEDEC ball out, and die exposure. The polymeric tape layers have surface circuits (e.g., leads, pads, and wiring) located on the surface.
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