发明名称 PROCEDE ET DISPOSITIF DE SIMULATION D'UN SIGNAL DE REINITIALISATION DANS UN SYSTEME SUR PUCE SIMULE
摘要 <p>A method and system for simulating a reset signal in a modeled system comprises a reset control module and a module to be reset. Operations of the system include emitting by a control thread of the control module a reset signal, receiving by the module to be reset the reset signal, waking up a thread of the module to be reset, and waiting for a reset signal. If the thread is woken up by the reset signal further operations include activating a reset exception by the thread, and if a reset exception is raised, making the thread wait for a reboot signal, transmitting the reboot signal by the control thread to the module to be reset, and after receiving the reboot signal, activating the thread which executes and waits for a reset signal.</p>
申请公布号 FR2947359(B1) 申请公布日期 2011.07.29
申请号 FR20090003179 申请日期 2009.06.30
申请人 ST MICROELECTRONICS (GRENOBLE 2) SAS 发明人 FIANDINO MAXIME
分类号 G06F17/50;G06F9/455 主分类号 G06F17/50
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