PROCEDE DE FABRICATION D'UNE LIAISON DE FIL D'OR RESISTANT A UNE TEMPERATURE ELEVEE POUR UN COMPOSANT ELECTRONIQUE

摘要

The method involves arranging a catalyst layer (6) on connection points (2) of a chip (1). A diffusion blocking layer (7) is arranged on the catalyst layer, and a gold layer (8) is applied on the blocking layer. A gold wire is connected to the gold layer by a welding process. The gold layer has a thickness of 30 to 500 nanometer and the blocking layer has a thickness of 0.8 to 5 micrometer. - An INDEPENDENT CLAIM is also included for a gold wire connection for semi-conductor component.