发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF DESIGNING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit wherein a chip size is reduced, and to provide a method of designing the semiconductor integrated circuit. SOLUTION: The semiconductor integrated circuit includes an active region 1 formed in a first region, a well region 2 formed in a second region, transistor gate electrodes 3, dummy gate electrodes 5, and contacts 8. The active region 1 and transistor gates 3 form a transistor. The transistor gate electrodes 3 and dummy gate electrodes 5 are formed along a plurality of straight lines which are parallel with each other. The dummy gate electrodes 5 are formed so as to be arranged in both second region and first region. The contacts 8 are formed in the second region, and the dummy gate electrodes 5 are electrically connected to a wiring layer 6 having the same potential in the well region 2. Such a device is reducible in layout size of a region where the active region 1 and well region 2 are arranged, and consequently the chip size is reduced. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011146478(A) 申请公布日期 2011.07.28
申请号 JP20100005042 申请日期 2010.01.13
申请人 RENESAS ELECTRONICS CORP 发明人 SATO MASARU
分类号 H01L21/82;H01L21/768;H01L21/822;H01L21/8234;H01L27/04;H01L27/088;H01L29/41 主分类号 H01L21/82
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