发明名称 Output Buffer Circuit and Method for Avoiding Voltage Overshoot
摘要 An output buffer circuit for avoiding voltage overshoot includes an input stage, an output bias circuit, an output stage, a clamp circuit, and a control unit. The input stage includes a positive input terminal, for receiving an input voltage, and a negative input terminal. The input stage generates a current signal according to the input voltage. The output bias circuit is coupled to the input stage, for generating a dynamic bias according to the current signal. The output stage is coupled to the input stage and the output bias circuit, including an output terminal, reversely coupled to the positive input terminal, and at least one output transistor, coupled to the output bias circuit and the output terminal, for providing a driving current to the output terminal according to the dynamic bias to generate an output voltage.
申请公布号 US2011181336(A1) 申请公布日期 2011.07.28
申请号 US20100750671 申请日期 2010.03.30
申请人 HSU XIE-REN;CHEN JI-TING 发明人 HSU XIE-REN;CHEN JI-TING
分类号 H03K5/08 主分类号 H03K5/08
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