发明名称 Methods and Systems for Analyzing Electronic Design and Validation Models
摘要 A method and system for comparing a first model and a second model of an electronic design, wherein the first model is at a transaction level and the second model is at a register transfer level, comprises the steps of: translating signal values of the second model to a transaction stream; comparing a transaction stream of the first model against the transaction stream of the second model based on data at timing points of transaction phases of the transaction streams; and generating results based on the comparison of the transaction streams.
申请公布号 US2011184714(A1) 申请公布日期 2011.07.28
申请号 US201113014704 申请日期 2011.01.26
申请人 JEDA TECHNOLOGIES, INC. 发明人 ZHANG EUGENE;QIU XIAOPENG;KROLL ANDREA;ZHONG MING
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项
地址