| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To increase sense margin and to reduce read errors. <P>SOLUTION: A semiconductor memory device a NAND string, a bit line BL, a SEN node, and a capacitor. The NAND string includes plural memory cells. One end of the NAND string is connected to a bit line BL. The SEN node is configured to be electrically connected to the bit line BL, and is charged at a potential VDDSA and discharged by a cell current flowing through the memory cells for determining a memory cell selected from among the memory cells is an on-cell or an off-cell. In the capacitor, one end is connected to the SEN node while the other end is connected to a CLK node to which a voltage within a predetermined range is applied. A discharge rate of the SEN node is enhanced by decreasing a capacitance during discharge of the SEN node only when a selected memory cell selected from the plural memory cells is an on-cell. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
