摘要 |
<p>A transmission channel (1) is described comprising at least one high voltage buffer block (4) comprising buffer transistors (MB1, MB2, MB3, MB4) and respective buffer diodes (DB1, DB2, DB3, DB4), being inserted between respective voltage references (HVP0, HVP1, HVM0, HVM1), a clamping circuit (10) being connected to a first output terminal (HVout) of the transmission channel (1), an antinoise block (6) being connected between the first output terminal (HVout) and a connection terminal (Xdcr) of the transmission channel (1); as well as a switching circuit (30) being inserted between the connection terminal (Xdcr) and a second output terminal (LVout) of the transmission channel (1). Advantageously according to the invention, the clamping circuit (10) comprises a clamping core (11), a reset circuit (20) comprising diodes (DME1, DME2, DME3, DME4 ) inserted between circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2) of the high voltage buffer block (4) and of the clamping circuit (10), the circuit nodes (XME1, XME2, XME3, XME4, XC1, XC2 ) being in correspondance with conduction terminals of said transistors (MB1,MB2,MB3,MB4,MC1,MC2) comprised into the high voltage buffer block(4) and into the clamping circuit (10), and a switching circuit (30).</p> |
申请人 |
STMICROELECTRONICS S.R.L.;ROSSI, SANDRO;RICOTTI, GIULIO;GHISU DAVIDE UGO;RICCIARDO, ANTONIO |
发明人 |
ROSSI, SANDRO;RICOTTI, GIULIO;GHISU DAVIDE UGO;RICCIARDO, ANTONIO |