发明名称 |
Method and apparatus to efficiently generate a processor architecture model |
摘要 |
A method and apparatus for efficiently generating a processor architecture model that accurately predicts performance of the processor for minimizing simulation time are described. In one embodiment, the method comprises: identifying a performance benchmark of a processor; sampling a portion of a design space for the identified performance benchmark; simulating the sampled portion of the design space to generate training data; generating a processor performance model from the training data by modifying the training data to predict an entire design space; and predicting performance of the processor for the entire design space by executing the processor performance model. |
申请公布号 |
EP2348431(A1) |
申请公布日期 |
2011.07.27 |
申请号 |
EP20100252095 |
申请日期 |
2010.12.10 |
申请人 |
INTEL CORPORATION |
发明人 |
BRACY, ANNE W.;MADHAV, MAHESH;WANG, HONG |
分类号 |
G06F17/50 |
主分类号 |
G06F17/50 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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