| 摘要 |
<p>A method and a system for controlling an inter-integrated circuit (I2C) bus are provided, the method comprises: dividing a serial clock line (SCL) signal collected from an I2C bus of a master device to a plurality of paths of signals, and extending the signals to an I2C bus of a slave device, by a complex programmable logic device (CPLD); judging current states of data and determining a direction of a current serial data line (SDA) signal, between SDA signals collected from the I2C buses of the master device and SDA signals collected from the I2C buses of the slave device. The system may reduce cost and design complexity of a motherboard.</p> |
