发明名称 DEEP TRENCH CAPACITOR FOR SOI CMOS DEVICES FOR SOFT ERROR IMMUNITY
摘要 A semiconductor structure is disclosed. The semiconductor structure includes an active semiconductor layer, a semiconductor device having a gate disposed on top of the active semiconductor layer, and source and drain regions and a body/channel region disposed within the active semiconductor layer, an insulator layer having a first and second side, the first side being adjacent to the active semiconductor layer, a substrate disposed adjacent to the second side of the insulator layer, a deep trench capacitor disposed under the body/channel region of the semiconductor device. The deep trench capacitor electrically connects with and contacts the body/channel region of the semiconductor device, and is located adjacent to the gate of the semiconductor device. The semiconductor structure increases a critical charge Qcrit, thereby reducing a soft error rate (SER) of the semiconductor device.
申请公布号 US2011177660(A1) 申请公布日期 2011.07.21
申请号 US201113075271 申请日期 2011.03.30
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 BARTH, JR. JOHN E.;BERNSTEIN KERRY;CANNON ETHAN H.;WHITE FRANCIS R.
分类号 H01L21/8242 主分类号 H01L21/8242
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