发明名称 Debugging a multiprocessor system that switches between a locked mode and a split mode
摘要 A data processing system 2 is provided with multiple processors 4, 6 which can operate in either a split-mode in which each processor executes its own program flow or a locked-mode in which the processors execute the same program flow. Debug circuitry 8, 10 is associated with each of the processors. In an emulation-locked mode of operation, one of the processors 4 is active and its respective debug circuitry 8 is active to update the debug state data so as to debug the locked mode code. At the same time, the second processor 6 is held inactive and its state is maintained as well as the debug state data of the debug circuitry 10 within that inactive processor. This maintains the debug state data of the processor 6 across entry and exit to the locked mode of operation.
申请公布号 US2011179309(A1) 申请公布日期 2011.07.21
申请号 US20100656248 申请日期 2010.01.21
申请人 ARM LIMITED 发明人 PATHIRANE CHILODA ASHAN SENERATH;PENTON ANTONY JOHN
分类号 G06F11/07 主分类号 G06F11/07
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