发明名称 SAMPLING RATE CONVERTER DATA FLOW CONTROL MECHANISM
摘要 <p>Sampling rate converter for performing a rate conversion of an incoming stream of data, clocked at a first frequency, and output at a second frequency; said converter comprising: a circuit (2) for up-sampling the incoming data stream; a filter (3) for filtering the up-sampled incoming data stream; an interpolation filter (4) for interpolating the filtered up-sampled incoming stream of data; a FIFO (5) for storing the interpolated filtered up-sampled incoming stream of data, said storing being performed at said first frequency and the reading of said FIFO being performed at said second frequency so as to output the stored data at a second corresponding rate; characterized in that it further comprises: a control block (10) comprising a numerically controlled oscillator (NCO) used for generating said first frequency, the control of said NCO being based on information representative of the status of said FIFO (5) and also information representative of the modulation of the data and ratio of sampling rate change.</p>
申请公布号 WO2011085947(A1) 申请公布日期 2011.07.21
申请号 WO2011EP00034 申请日期 2011.01.07
申请人 ST-ERICSSON SA;TUDOSE, ANDREI 发明人 TUDOSE, ANDREI
分类号 H03H17/06;H04L7/00 主分类号 H03H17/06
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