发明名称 Fault test apparatus and method for testing semiconductor device under test using fault excitation function
摘要 A fault test apparatus for testing a fault on each signal line in a circuit under test including signal lines includes a controller, which calculates a value of a fault excitation function for a fault signal line, using the fault excitation function representing a fitness result of a predetermined fault excitation condition between the fault signal line having a fault among the signal lines under test in the circuit under test and at least one of adjacent signal lines adjacent to the fault signal line and falling within a predetermined range from the fault signal line, based on layout information between the fault signal line and at least one adjacent signal line adjacent to the fault signal line, manufacturing parameter information, and timing information, and then, determines whether or not a dynamic fault is excited on the fault signal line based on the value of the fault excitation function.
申请公布号 US7983858(B2) 申请公布日期 2011.07.19
申请号 US20080222992 申请日期 2008.08.21
申请人 SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTER 发明人 TAKAMATSU YUZO;TAKAHASHI HIROSHI;HIGAMI YOSHINOBU;NAKAO MICHINOBU;AIKYO TAKASHI;EMORI MICHIAKI;OHMAE HIDEO
分类号 G06F19/00 主分类号 G06F19/00
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