| 摘要 |
A digital signal transmitting apparatus includes an encoder which converts parallel input signals of multiple channels into serial data in a manner synchronized with a first clock signal, and a decoder which converts the serial data into parallel output signals of the multiple channels in a manner synchronized with a second clock signal operating in a manner asynchronous with the first clock signal. The serial data has a different period and a different duty factor corresponding to each combination of the logical values of the parallel input signals of the multiple channels.
|
