发明名称 Memory control apparatus and memory control method
摘要 A memory control apparatus and a memory control method are provided to enable an effective utilization of buffer memory in a system LSI by comprising buffer memory for temporarily storing data stored in memory, and comprising the processes of: receiving an instruction to the memory; transmitting a buffer memory security-dedicated use packet for securing the capacity of memory in the buffer memory required by the instruction on the basis of the received instruction; receiving a buffer memory validation signal corresponding to the transmitted buffer memory security-dedicated use packet; and executing the received instruction on the basis of the received buffer memory validation signal.
申请公布号 US7984234(B2) 申请公布日期 2011.07.19
申请号 US20080196739 申请日期 2008.08.22
申请人 FUJITSU LIMITED 发明人 IWASAKI SHINICHI
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
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