发明名称 |
Structure for Use in Fabrication of PiN Heterojunction TFET |
摘要 |
A method for fabricating a structure for use in fabrication of a PiN heterojunction tunnel field effect transistor (TFET) includes forming an alignment trench in a silicon wafer; forming a silicon germanium (SiGe) growth trench in the silicon wafer; growing a p-type SiGe region in the SiGe growth trench; forming a first oxide layer over the alignment trench and the p-type SiGe region; forming a hydrogen implantation region in the silicon wafer, the hydrogen implantation region dividing the silicon wafer into a upper silicon region and a lower silicon region; bonding the first oxide layer to a second oxide layer located on a handle wafer, forming a bonded oxide layer comprising the first oxide layer and the second oxide layer; and separating the lower silicon region from the upper silicon region at the hydrogen implantation region.
|
申请公布号 |
US2011169051(A1) |
申请公布日期 |
2011.07.14 |
申请号 |
US20100684331 |
申请日期 |
2010.01.08 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION |
发明人 |
BANGSARUNTIP SARUNYA;KOESTER STEVEN;LAUER ISAAC;SLEIGHT JEFFREY W. |
分类号 |
H01L29/06;H01L21/762;H01L29/78 |
主分类号 |
H01L29/06 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|