发明名称 Method for Forming a Via in a Substrate and Substrate with a Via
摘要 The present invention relates to a method for forming a via in a substrate and a substrate with a via. The method for forming a via in a substrate includes the following steps: (a) providing a substrate having a first surface and a second surface; (b) forming a groove that has a side wall and a bottom wall on the first surface of the substrate; (c) forming a first conductive metal on the side wall and the bottom wall of the groove so as to form a central groove; (d) forming a center insulating material in the central groove; (e) forming an annular groove that surrounds the first conductive metal on the first surface of the substrate; (f) forming a first insulating material in the annular groove; and (g) removing part of the second surface of the substrate to expose the first conductive metal, the center insulating material and the first insulating material. As a result, thicker insulating material can be formed in the via, and the thickness of the insulating material in the via is even.
申请公布号 US2011171829(A1) 申请公布日期 2011.07.14
申请号 US201113051501 申请日期 2011.03.18
申请人 ADVANCED SEMICONDUCTOR ENGINEERING, INC. 发明人 WANG MENG-JEN
分类号 H01L21/28 主分类号 H01L21/28
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