发明名称 SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a semiconductor memory device and its manufacturing method reducing an aspect ratio of a contact hole. SOLUTION: The semiconductor memory device is equipped with: a plurality of memory cell transistors M installed with a predetermined space on a semiconductor substrate 11a and connected in series; a plurality of NAND strings with selection gate transistors T formed at both ends of the plurality of memory cell transistors M; and a contact plug 18 installed in between the selection gate transistors T of the adjoining NAND strings. When a width in first direction between the adjacent selection gate transistors T is equal to the summation of k times (k is a natural number) the gate length of the memory cell transistor M and (k+1) times the predetermined space, the width of the contact plug 18 in the first direction is characteristically longer than the summation of k times the gate length of the memory cell transistor M and (k-1) times the predetermined space. COPYRIGHT: (C)2011,JPO&INPIT
申请公布号 JP2011138962(A) 申请公布日期 2011.07.14
申请号 JP20090298511 申请日期 2009.12.28
申请人 TOSHIBA CORP 发明人 YAMADA KUNIHIRO
分类号 H01L21/8247;H01L27/115;H01L29/788;H01L29/792 主分类号 H01L21/8247
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