发明名称 RECLAIMING USABLE INTEGRATED CIRCUIT CHIP AREA NEAR THROUGH-SILICON VIAS
摘要 Roughly described, an integrated circuit device includes a substrate including a via passing therethrough, a strained electrically conductive first material in the via, the first material tending to introduce first stresses into the substrate, and a strained second material in the via, the second material tending to introduce second stresses into the substrate which at least partially cancel the first stresses. In an embodiment, SiGe is grown epitaxially on the inside sidewall of the via in the silicon wafer. SiO2 is then formed on the inside surface of the SiGe, and metal is formed down the center. The stresses introduce by the SiGe tend to counteract the stresses introduced by the metal, thereby reducing or eliminating undesirable stress in the silicon and permitting the placement of transistors in close proximity to the TSV.
申请公布号 US2011169140(A1) 申请公布日期 2011.07.14
申请号 US20100687358 申请日期 2010.01.14
申请人 SYNOPSYS, INC. 发明人 MOROZ VICTOR
分类号 H01L23/48;H01L21/768 主分类号 H01L23/48
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