发明名称 List structure control circuit
摘要 A list structure control circuit includes memories each individually stores data, selection circuits arranged for each of the memories and series-connect the memories so that data stored in each memory has an order relation, and an update control circuit that adds a position selection signal which specifies a position for data insertion or data removal to a fixed value, or subtracts the position selection signal from the fixed value, generates an enable signal based on the calculation result, and controls data retention performed in the memories or data update performed in the memories using data of a memory in precedent stages based on the generated enable signal, wherein the selection circuits are controlled based on the position selection signal at the time of the data insertion, and data stored in a memory located at the position specified by the position specification signal is updated with data to be inserted.
申请公布号 EP2343640(A2) 申请公布日期 2011.07.13
申请号 EP20110150391 申请日期 2011.01.07
申请人 FUJITSU LIMITED 发明人 TOYOSHIMA, TAKASHI
分类号 G06F7/00;G06F17/30 主分类号 G06F7/00
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