发明名称 Voltage margin testing for proximity communication
摘要 A method of testing a proximity communication system for voltage margin by impressing a voltage upon the data link between the transmitter on one chip and the receiver on the other chip coupled to the transmitter through a capacitively coupling circuit formed by juxtaposed capacitor pads on the respective two chips. The impressed voltage is varied and the output of the receiver is monitored to determine an operational voltage margin. The floating inputs on the receiver may be continuously biased by connecting them to variable biasing supply voltages through high impedances. When the floating inputs are periodically refreshed to a refresh voltage during a quiescent data period, the refresh voltage is varied between successive refresh cycles. The variable test voltage may be applied to transmitter output when it is in a high-impedance state, and the output of the receiver is measured.
申请公布号 US7979754(B2) 申请公布日期 2011.07.12
申请号 US20090352488 申请日期 2009.01.12
申请人 ORACLE AMERICA, INC. 发明人 DROST ROBERT J.;HO RONALD;SCHAUER JUSTIN M.
分类号 G06F11/00 主分类号 G06F11/00
代理机构 代理人
主权项
地址
您可能感兴趣的专利