发明名称 Fabricating vias of different size of a semiconductor device by splitting the via patterning process
摘要 When forming a complex metallization system in which vias of different lateral size have to be provided, a split patterning sequence may be applied. For this purpose, a lithography process may be specifically designed for the critical via openings and a subsequent second patterning process may be applied for forming the vias of increased lateral dimensions, while the critical vias are masked. In this manner, superior process conditions may be established for each of the patterning sequences.
申请公布号 US7977237(B2) 申请公布日期 2011.07.12
申请号 US20100894648 申请日期 2010.09.30
申请人 GLOBALFOUNDRIES INC. 发明人 FEUSTEL FRANK;WERNER THOMAS;FROHBERG KAI
分类号 H01L21/4763;H01L21/44 主分类号 H01L21/4763
代理机构 代理人
主权项
地址