发明名称 METHOD FOR DESIGNING MASK, APPARATUS FOR DESIGNING MASK, PROGRAM, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a method for designing a mask, capable of reducing a process time of an OPC process. <P>SOLUTION: The method for designing a mask includes steps of: acquiring a layout data showing a layout; reading out a first post-OPC process data corresponding to the layout data from a table that correlates a basic layout data representing a basic layout and a first post-OPC process data after a first OPC process with respect to the basic layout data; creating a first initially corrected data of the layout data by adding the read first post-OPC process data to the layout data; and creating a second post-OPC process data by carrying out at least once a second OPC process on the first initially corrected data so as to obtain a desired feature of the layout data. <P>COPYRIGHT: (C)2011,JPO&INPIT</p>
申请公布号 JP2011133795(A) 申请公布日期 2011.07.07
申请号 JP20090295169 申请日期 2009.12.25
申请人 RENESAS ELECTRONICS CORP 发明人 FUKUSHIMA MASAYUKI
分类号 G03F1/36;G03F1/68;G03F1/70;G06F17/50 主分类号 G03F1/36
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