发明名称 PATTERN EVALUATION SYSTEM, PATTERN EVALUATION METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD
摘要 In accordance with an embodiment, a pattern evaluation system includes an image acquisition unit, a plurality of image processing units, and a control unit which controls the plurality of image processing units. The image acquisition unit loads a series of images of a pattern to be evaluated. The images are acquired at a first speed. The plurality of image processing units process the series of images at a second speed and then output a result of the evaluation of the pattern to be evaluated. The control unit acquires the first and second speeds, estimates the number of the image processing units which allow the time for acquiring the series of images to be substantially the same as the time for processing the series of images, and allocates the estimated image processing units to the processing of the series of images.
申请公布号 US2011164807(A1) 申请公布日期 2011.07.07
申请号 US20100847716 申请日期 2010.07.30
申请人 MITSUI TADASHI 发明人 MITSUI TADASHI
分类号 G06K9/00;H01L21/66 主分类号 G06K9/00
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