RECEIVER FOR MIPI CSI WITH MULTI-LANE STRUCTURE

摘要

PURPOSE: A receiver for MIPI CSI with a multi-lane structure is provided to use same clock frequency as a single lane structure by implement data combination structure suitable for multiple lanes and a multi-stage CRC calculation structure. CONSTITUTION: In a receiver for MIPI CSI with a multi-lane structure, A data combination unit(100) selects a lane according to a predetermined lane selection signal among n lanes. The data combination unit stores data by a bite unit through a selected lane. A multi-stage CRC calculation unit performs CRC(Cyclic Redundancy Check) calculation of data having 1 to n bite. The multi-stage CRC calculation unit performs CRC(Cyclic Redundancy Check) calculation of(K+1)-th bite by using CRC calculation value of k-th bite.