DATA RETENTION CIRCUIT

摘要

PURPOSE: A data retention circuit is provided to improve the degree of integration by providing a data storing and restoration without an additional retention latch. CONSTITUTION: In a data retention circuit, a master latch(210) is connected to a first node(211) and a second node(212). A slave latch(220A) is connected to a third node(223) and a fourth node(224). A first switch forms a current path between the first node and the third node. A second switch forms a current path between the second Node and fourth node. A connection circuit(230) comprises the first to fourth MOS transistors(231-234).