| 摘要 |
PURPOSE: A method for manufacturing a semiconductor device is provided to reduce a chip size while implement low program voltage by forming a low bias voltage using a recess topology at the interface between an active area and an element isolation area. CONSTITUTION: In a method for manufacturing a semiconductor device, an active area(110) and an element isolation region(120) are formed in a semiconductor substrate(100). A gate pattern, a source area, and a drain area are formed on the semiconductor substrate. A salicide(170) is formed on the only top of the gate pattern and source area. An inter-layer insulating film(180) is deposited in the front side of the semiconductor substrate. An inter-layer insulating film at the boundary of the active area and the element isolation area is etched to form a hole The insulating material is deposited on the hole to form an ant-fuse.
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