发明名称 |
Techniques for on-chip termination |
摘要 |
A circuit includes first transistors and a comparator. The comparator compares a reference signal and a signal that is based on conductive states of the first transistors. A control circuit generates first control signals based on an output signal of the comparator. The conductive states of the first transistors are determined based on the first control signals. An arithmetic circuit performs an arithmetic function based on the first control signals and second control signals to generate calibration signals. Second transistors provide a termination impedance at an external terminal of the circuit that is based on the calibration signals.
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申请公布号 |
US7973553(B1) |
申请公布日期 |
2011.07.05 |
申请号 |
US20100721759 |
申请日期 |
2010.03.11 |
申请人 |
ALTERA CORPORATION |
发明人 |
WANG XIAOBAO;SUNG CHIAKANG;WANG BONNIE I.;NGUYEN KHAI;BUI JOHN HENRY |
分类号 |
H03K17/16;H03K19/003 |
主分类号 |
H03K17/16 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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