发明名称 |
Semiconductor die package including exposed connections |
摘要 |
A clip structure and semiconductor die package. The clip structure includes a first portion and a second portion, with a connecting structure located between the first and second portion. The clip structure is substantially planar. The semiconductor die package includes a semiconductor die located between a leadframe structure and a clip structure. Slots are formed within the molding material covering portions of the semiconductor die package. The slots are located between a first portion and the second portion of the clip structure, and the slot overlap with the semiconductor die. |
申请公布号 |
US7972906(B2) |
申请公布日期 |
2011.07.05 |
申请号 |
US20080044314 |
申请日期 |
2008.03.07 |
申请人 |
FAIRCHILD SEMICONDUCTOR CORPORATION |
发明人 |
CRUZ ERWIN VICTOR R.;ESTACIO MARIA CRISTINA B. |
分类号 |
H01L21/00 |
主分类号 |
H01L21/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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