摘要 |
<P>PROBLEM TO BE SOLVED: To provide a transmitter and a receiver, capable of reducing the number of traces for clock transmission between the transmitter and the plurality of receivers and transmitting data at high speed. <P>SOLUTION: The receivers 20<SB>1</SB>-20<SB>N</SB>are arrayed one-dimensionally in the order. The receiver 20<SB>n</SB>includes a data input buffer 21, a first clock input buffer 22<SB>1</SB>and a first clock output buffer 23<SB>1</SB>. The first clock input buffer 22<SB>1</SB>buffers a clock input to first clock terminals P<SB>21</SB>, P<SB>22</SB>and outputs it to the first clock output buffer 23<SB>1</SB>. The first clock output buffer 23<SB>1</SB>buffers the clock inputted from the first clock input buffer 22<SB>1</SB>and outputs it from second clock terminals P<SB>31</SB>, P<SB>32</SB>. Data input terminals P<SB>11</SB>, P<SB>12</SB>are disposed between the first clock terminals and the second clock terminals. <P>COPYRIGHT: (C)2011,JPO&INPIT |