| 摘要 |
PROBLEM TO BE SOLVED: To reduce leakage current in a sequence circuit with low size and low power. SOLUTION: FFs and a combinational logic circuit are connected so that combinational logic circuits 102A to N show a minimum leakage current when reset flip-flops 104A to 104N, 108A to 108N, 112A to 112N are in reset state and set reset flip-flops 106A to 106N, 110A to 110N, 114A to 114N are in set state. A control module 116 applies predetermined minimum leak bits to the combinational logic circuit by resetting the reset FF and setting the set reset FF in a standby mode. Accordingly, the combinational logic circuit is in the standby mode at the minimum leakage current. In an active mode, inputs 120A to 120N are supplied to the combinational logic circuit 102A via FF and subjected to logical treatment, and output of a combinational logic circuit of its preceding stage is input to a combinational logic circuit of a next stage via FF one by one. COPYRIGHT: (C)2011,JPO&INPIT
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