| 摘要 |
<p>A semiconductor device (827) comprises a semiconductor memory device (822) and a logic circuit (123). The semiconductor memory device (822) further comprises two memory array regions (802a, 802b). The output of one memory array region is treated as the input of the other memory array region, allowing inverting the read/write control of each respective memory array region, thus facilitating innate inspection on the part of the semiconductor memory device (822).</p> |
