发明名称 SPE Software Instruction Cache
摘要 An application thread executes a direct branch instruction that is stored in an instruction cache line. Upon execution, the direct branch instruction branches to a branch descriptor that is also stored in the instruction cache line. The branch descriptor includes a trampoline branch instruction and a target instruction space address. Next, the trampoline branch instruction sends a branch descriptor pointer, which points to the branch descriptor, to an instruction cache manager. The instruction cache manager extracts the target instruction space address from the branch descriptor, and executes a target instruction corresponding to the target instruction space address. In one embodiment, the instruction cache manager generates a target local store address by masking off a portion of bits included in the target instruction space address. In turn, the application thread executes the target instruction located at the target local store address accordingly.
申请公布号 US2011161641(A1) 申请公布日期 2011.06.30
申请号 US20090648741 申请日期 2009.12.29
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 CHEN TONG;FLACHS BRIAN;MICHAEL BRAD WILLIAM;NUTTER MARK RICHARD;O'BRIEN KATHRYN M.;O'BRIEN JOHN KEVIN PATRICK
分类号 G06F9/38;G06F12/02 主分类号 G06F9/38
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