发明名称 POWER AMPLIFYING CIRCUIT, DC-DC CONVERTER, PEAK HOLDING CIRCUIT, AND OUTPUT VOLTAGE CONTROL CIRCUIT INCLUDING THE PEAK HOLDING CIRCUIT
摘要 PURPOSE: A power amplifying circuit, a direct current-direct current converter, a peak holding circuit, and an output voltage controlling circuit including the peak holding circuit are provided to sufficiently reduce power consumption by reducing the source voltage of the load driving section in an electric field effect transistor. CONSTITUTION: Variable power(701) applies a negative source voltage related to a controlling voltage from a voltage detecting circuit(708). A load driving section(705) includes transistors(705A, 705B) which are serially interposed between a high potential power line(701P) and a low potential power line(701M). A load driving section(706) includes N channel transistors(706A, 706B) which are serially interposed between the high potential power line and the low potential power line. A pre-driver(703) generates a gate voltage applied to the N channel transistors.
申请公布号 KR20110073354(A) 申请公布日期 2011.06.29
申请号 KR20100132503 申请日期 2010.12.22
申请人 YAMAHA CORPORATION 发明人 TSUJI NOBUAKI
分类号 H03F3/21;G01R19/04;H02M3/07 主分类号 H03F3/21
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