发明名称
摘要 A capacity size of a single block of a flash memory (2) is an integer multiple of a single sector size which is a processing unit of an external host (4), and each of the first and second buffer RAMs interposed between the external host and the flash memory has a capacity corresponding to a single sector size of the flash memory, and data transmission between the external host and the buffer RAMs and between the flash memory and the buffer RAMs are performed by alternately selecting different buffer RAMs, and thus the data transmission between the buffer RAMs and the external host is performed simultaneously. and in parallel with performing the data transmission between the buffer RAMs and the flash memory.
申请公布号 JP4711531(B2) 申请公布日期 2011.06.29
申请号 JP20010084921 申请日期 2001.03.23
申请人 发明人
分类号 G06F12/00;G06F12/16;G11C7/10;G11C8/12;G11C16/02;G11C16/06 主分类号 G06F12/00
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